The present invention relates generally to semiconductor devices and, more particularly, to a semiconductor device assembled with a lead frame having corner cut-outs.
Integrated circuit or semiconductor dies are packaged in order to protect the dies. The package provides external electrical connections (as well as physical protection) to the die. Continued progress in reduction of the size of the semiconductor dies and increased functionality and complexity of the integrated circuits formed on the dies requires size reduction of the packaging with the same or greater complexity of the electrical connections with external circuits.
One typical type of package is a Quad Flat Pack (QFP), which is formed with a semiconductor die mounted to a lead frame. The lead frame is formed from a sheet of metal (e.g., copper) that includes a die attach pad often called a flag and arms that attach the flag to a frame. Leads or lead fingers of the lead frame are electrically connected to electrodes of the die (die bond pads) with bond wires. The lead fingers provide a means of easily electrically connecting the die to circuit boards and the like. After the electrodes and lead fingers pads are electrically connected, the semiconductor die, the bond wires and portions of the lead fingers are encapsulated in a compound (material) such as a plastic material leaving only sections of the leads exposed. The exposed leads are cut from the frame of the lead-frame (singulated) and bent for ease of connection to a circuit board. However, the inherent structure of QFP packages results in limiting the number of leads, and therefore the number of package external electrical connections, that can be used for a specific QFP package size. Further, the external electrical connections of lead frame based grid array packages are typically fabricated from a thin single sheet of conductive material, such as copper or aluminium, and these connections may not be sufficiently held within the encapsulating compound (material) and can become loose.
Grid array packages have been developed as an alternative to QFP packages. Grid array packages normally include a rectangular substrate sheet having die mounting pads accessible from a first side and package mounting pads accessible from an opposite side. A semiconductor die is attached to the substrate sheet so that the die electrodes are mounted to the die mounting pads and an encapsulating material covers the semiconductor die and the first side of the substrate sheet. This type of package may be susceptible to stress at corner regions of the substrate sheet especially during assembly and testing. Consequently, fractures and cracks can occur in the corner regions resulting in a defective package. It would be advantageous to have a substrate or lead frame for a package that allows for better adhesion of the mold compound to the substrate and prevents cracking of the package/substrate body.